1. Technical Field
The present invention is directed to data processing systems. More specifically, the present invention is directed to a method, apparatus, and computer program product for automatically enhancing a power distribution system (PDS) in a ceramic integrated circuit package.
2. Description of Related Art
Current trends in VLSI applications are pushing the requirements for current in an integrated circuit (IC), also called a chip, to be in the range of 200 amps and above under normal conditions and may be even higher IC's operating voltages are driven to values as low as 1 volt or less. A package to which the chip is coupled has a power distribution system (PDS) that is responsible for distributing power throughout the package and to the IC. A power distribution system includes all power nets such as all supply voltage nets as well as a ground net. The PDS has to be able to deliver such high current densities to the IC while at the same time having minimum impedance in order to keep any voltage losses at very low values throughout the many layers of the package.
Until recently, the PDS of first level packages has been more than adequate to meet the current and voltage requirements of high performance ICs. First level packages are interconnect devices that hold bare silicon chips and provide connectivity, power delivery, and heat removal between them and the rest of the larger electrical system. As new silicon technologies require more stringent power demands, the contributing ohmic resistive losses of the first level packaging portion start becoming more significant and need to be carefully designed and analyzed in order to ensure its adequacy.
The design of the PDS is particularly difficult in high signal density ceramic packages where the conductor materials are based in relatively lossy metal pastes which aggravate the ohmic resistive losses and where the routing of signal traces is so congested tending to limit the available real estate left for reinforcing the power distribution system. This is more problematic in the portions of the package that lie directly underneath the chip where most of the current density needs to flow and where the breakout wiring of signals consumes a large portion of the available space. In addition, the overall current flow takes place in the vertical direction from the bottom pins of the package to the top connections of the IC itself, thus causing the via interconnects to play a more predominant role than the horizontal solid or mesh plane connections.
When an engineering analysis determines that a package's power distribution system needs to be reinforced or enhanced, the task of finding opportunities in the design of the package where vias and traces can be added becomes very time consuming and labor intensive. The designer has to take into account the three-dimensional nature of the problem because the package includes many layers. Further, the number of via and/or elements that may be required to be added can be in the order of thousands.
The features provided by prior art systems do not offer the ability to locate possible additional via and/or trace locations in an automatic or large scale manner considering the entire package as a whole. Thus, this process of locating possible via and/or trace locations is a time consuming manual process.
Therefore, a need exists for a method, system, and computer program product for automatically enhancing a power distribution system (PDS) in a ceramic package by locating possible additional trace and/or via locations throughout the package considering the package as a whole.